In a binary segmented system, such as a digital to analog converter (DAC), for example, a unary array of 2n−1 elements may be used to represent n bits of an (m+n) bit array. The 2n−1 unary element array may be used with other circuit elements of lower bit significance to form the total (m+n) bit array; in such a case the lower significant circuit elements would sum to an approximate equivalent significance as a single element of the 2n−1 element unary array. In such systems, shuffling schemes can be used to reduce the effects of mismatch between circuit elements. Where mismatch between a unary array of 2n−1 elements is required a scheme for generating only 2n−1 unique shuffled outputs is required; a shuffling scheme generating 2n unique outputs when mapped to a 2n−1 unary array would have a repetitive sequence causing less than ideal shuffling auto-correlation.